Hardware Detail

Item Reference:	HW0533
Machine Type:	5384416	Serial Number:
	Capacitive Read Only Storage (CROS)
	Developed in Hursley, this Balanced Capacitor ROS was used in the IBM System/360 Model 50. It is called balanced because the capacitance load on the word line is the same regardless of the pattern of bits. This is as opposed to the Card Capacitor ROS used in the Model 30 where the number of 1 bits changes the word line capacitance. The balanced approach allows a faster access time: the timing of the Model 50 was 90 ns access and 200 ns cycle. The disadvantage of the balanced approach is that the bit patterns have to be manufactured into the card, as opposed to the card capacitor approach where new ROS bits can be created on site. A ROS bit is represented by two locations along the word lines. There are two "word" line for each bit: one is the drive line to trigger reading. Attached to this line is one "pad" shaped per bit. There are two sense lines for each bit on the sensing plane that the ROS cards are pressed against: one for 1 and one for 0. The position of this bit pad over the two sense lines determines whether it is represents a 1 or 0. The other word line a "balance" line for attaching the complement of the bit flags. For example, compare the first two bits of the top two bit rows in Figure 11. The first two bit pads are the same: the right pad is attached to the drive line. The next bits are different: top row has left pad attached, and next row has right pad attached. (Much more about this particular storage design can be found in S.A.Abbas,A Balanced capacitor Read-Only Storage, IBM Journal, July 1968.)
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Location:	On Display - HLG03	Commissioned By: Museum	Until: